Hardware Design Using VHDL
(When the student completes the course, he/she will have a bunch of labs and a project work that can be presented in a job interview)
1)
Have
a clear idea about the basic logic elements that will be used to design a
digital block. (Digital 101 will be handled during the initial part of the
course. ZAck’s slide presentation will be used as a textbook for this purpose.)
2)
Have
a good idea about design flow methodology used in a chip design process.
3)
Learn
how to write synthesizable VHDL code for
all the basic logic elements.
4)
Learn
how to validate a design by writing test benches. The test benches will be
written using
·
Force
files
·
Simple
processes
·
Procedure
based.
·
Procedures
and records
5)
Learn
how to design some very important logic blocks like
·
Register
Banks
·
FIFOs
·
Parametrizable
Counters
·
Serializers/
Deserializers
·
Arbiters
·
Priority
encoders
·
And
more
6)
Learn
to use the following VHDL constructs like
·
Sequential
·
Concurrent
·
Generics
·
Configurations
·
Attributes
· And more
7)
Code
a State machine in different styles and test them
·
Mealy
·
Moore
·
Mealy/Moore
8)
Know
the uses of various different VHDL IEEE libraries and function Overloading
9) Gain knowledge on Special Topics like
·
Reusable,
Parametrizable and synthesizable hardware design
·
Procedural
Bus functional models – what and why?
·
VHDL
–93 and Foreign Language Interface
10) Will learn how to
build a High speed Serial Engine (as a part of project work).