Copper is replacing aluminum as the metal of choice in on-chip interconnection because of its superior electrical conductivity.  Since copper cannot be dry-etched, a new process called the Damascene process is being introduced where electroplating of copper in submicron trenches and holes is followed by chemical-mechanical polishing. The use of copper allows the development of faster chips and the dissipation of less heat.

 

 

Fig 1 Schematic of Chemical Mechanical Planarization (CMP) Process

(Copyright © 2003 Peter Wolters AG, Germany - http://www.peter-wolters.com/)

 

CMP Equipment

http://www.semiseek.com/Pag00654.htm

 

CMP Research Groups in USA

 

Clarkson University:

Dr. S.V.BABU

Comprehensive Studies

http://www.clarkson.edu/camp/DCAMP/babu.html

 

University of Florida:

Dr. Rajiv K. Singh

Miscellaneous studies

http://www.mse.ufl.edu/~rsing/index.htm

 

University of Berkeley:

Dr. Fiona M. Doyle

            Electrochemistry of CMP

http://www.mse.berkeley.edu/faculty/Doyle/Doylebio.html

 

Arizona State University:

            Dr.  Stephen P. Beaudoin 

Macro-scale simulations of mechanical removal

https://engineering.purdue.edu/ChE/Directory/Faculty/Beaudoin.html

Dr. James B. Adams

            Atomic-scale simulations of mechanical and chemical processes

http://ceaspub.eas.asu.edu/cms/